//****************************************************************************
// @Module        Project Settings
// @Filename      TLE9832_XSFR.H
//----------------------------------------------------------------------------
// @Controller    Infineon TLE9832
//
// @Compiler      Keil
//
//
// @Description   This is the include header file for all other modules.
//
//----------------------------------------------------------------------------
// @Date          06.05.2009
//
//****************************************************************************




/* XSFR address definition in plain format */

#define WAKE_STATUS 0x00
#define PMU_SUPPLY_STS 0x01
#define HALL_SUPPY_CTRL 0x02
#define PMU_ERROR_STS 0x03
#define PMU_RST_STS 0x04
#define SUPPLEMENT_CTRL 0x05
#define INTERRUPT_STATUS 0x06
#define WDT1_TRIG 0x07
#define PMU_WAKEUP_CTRL 0x08
#define SWITCHES_INTERRUPT_STATUS 0x09
#define CNF_CYC_SENSE 0x0A
#define CNF_CYC_WAKE 0x0B
#define CNF_CYC_SAMPLE_DEL 0x0C
#define MON1_CRTL_STS 0x0D
#define MON2_CRTL_STS 0x0E
#define MON3_CRTL_STS 0x0F
#define MON4_CRTL_STS 0x10
#define MON5_CRTL_STS 0x11
#define LIN_CTRL 0x12
#define LIN_CTRL_STS 0x13
#define LIN_TEST 0x14
#define LS1_CTRL 0x15
#define LS2_CTRL 0x16
#define HS_CTRL 0x17
#define HS_CTRL2 0x18
#define CLKGEN 0x19
#define OPA_CTRL 0x1A
#define RESPIN_BLIND_TIME 0x1B
#define MEASUREMENT_CTRL 0x1C
#define HS2_CTRL 0x1E
#define HS2_CTRL2 0x1F
#define WAKE_STS_FAIL 0x20
#define WAKE_STS_MON 0x21
#define WAKE_STS_GPIO0 0x22
#define WAKE_STS_GPIO1 0x23
#define WAKE_CONF_GPIOP0_RI 0x24
#define WAKE_CONF_GPIOP0_FA 0x25
#define WAKE_CONF_GPIOP1_RI 0x26
#define WAKE_CONF_GPIOP1_FA 0x27
#define WAKE_CNF_GPIO0_CYC 0x28
#define WAKE_CNF_GPIO1_CYC 0x29
#define PMU_WAKEUP_TIMING 0x2B
#define MEAS_CTRL_ADC1 0x2F
#define MEAS_ADC1_SQ1 0x30
#define MEAS_ADC1_SQ2 0x31
#define MEAS_ADC1_SQ3 0x32
#define MEAS_ADC1_SQ4 0x33
#define MEAS_ADC1_SQ5 0x34
#define MEAS_ADC1_SQ6 0x35
#define MEAS_ADC1_SQ7 0x36
#define MEAS_ADC1_SQ8 0x37
#define ADC1_MMODE0_3 0x38
#define ADC1_MMODE4_7 0x39
#define ADC1_FILT0_3_LEN 0x3A
#define ADC1_FILT4_7_LEN 0x3B
#define ADC1_FILT_UP_CTRL 0x3C
#define ADC1_FILT_LO_CTRL 0x3D
#define ADC1_FILT_OUT0 0x3E
#define ADC1_FILT_OUT1 0x3F
#define ADC1_FILT_OUT2 0x40
#define ADC1_FILT_OUT3 0x41
#define ADC1_FILT_OUT4 0x42
#define ADC1_FILT_OUT5 0x43
#define ADC1_FILT_OUT6 0x44
#define ADC1_FILT_OUT7 0x45
#define ADC1_TH0_UPPER 0x46
#define ADC1_TH1_UPPER 0x47
#define ADC1_TH2_UPPER 0x48
#define ADC1_TH3_UPPER 0x49
#define ADC1_TH4_UPPER 0x4A
#define ADC1_TH5_UPPER 0x4B
#define ADC1_TH6_UPPER 0x4C
#define ADC1_TH7_UPPER 0x4D
#define ADC1_CNT0_UPPER 0x4E
#define ADC1_CNT1_UPPER 0x4F
#define ADC1_CNT2_UPPER 0x50
#define ADC1_CNT3_UPPER 0x51
#define ADC1_CNT4_UPPER 0x52
#define ADC1_CNT5_UPPER 0x53
#define ADC1_CNT6_UPPER 0x54
#define ADC1_CNT7_UPPER 0x55
#define ADC1_TH0_LOWER 0x56
#define ADC1_TH1_LOWER 0x57
#define ADC1_TH2_LOWER 0x58
#define ADC1_TH3_LOWER 0x59
#define ADC1_TH4_LOWER 0x5A
#define ADC1_TH5_LOWER 0x5B
#define ADC1_TH6_LOWER 0x5C
#define ADC1_TH7_LOWER 0x5D
#define ADC1_CNT0_LOWER 0x5E
#define ADC1_CNT1_LOWER 0x5F
#define ADC1_CNT2_LOWER 0x60
#define ADC1_CNT3_LOWER 0x61
#define ADC1_CNT4_LOWER 0x62
#define ADC1_CNT5_LOWER 0x63
#define ADC1_CNT6_LOWER 0x64
#define ADC1_CNT7_LOWER 0x65
#define ADC1_UP_IRQ_CTRL 0x66
#define ADC1_LOW_IRQ_CTRL 0x67
#define ADC1_UP_IRQ_STS 0x68
#define ADC1_LOW_IRQ_STS 0x69
#define MEAS_CTRL_ADC2 0x6F
#define MEAS_ADC2_SQ1 0x70
#define MEAS_ADC2_SQ2 0x71
#define MEAS_ADC2_SQ3 0x72
#define MEAS_ADC2_SQ4 0x73
#define MEAS_ADC2_SQ5 0x74
#define MEAS_ADC2_SQ6 0x75
#define MEAS_ADC2_SQ7 0x76
#define MEAS_ADC2_SQ8 0x77
#define ADC2_MMODE0_3 0x7A
#define ADC2_MMODE4_7 0x7B
#define ADC2_FILT2_CTRL 0x7C
#define ADC2_FILT0_3_LEN 0x7D
#define ADC2_FILT4_7_LEN 0x7E
#define ADC2_FILT_UP_CTRL 0x7F
#define ADC2_FILT_LO_CTRL 0x80
#define ADC2_FILT_OUT0 0x81
#define ADC2_FILT_OUT1 0x82
#define ADC2_FILT_OUT2 0x83
#define ADC2_FILT_OUT3 0x84
#define ADC2_FILT_OUT4 0x85
#define ADC2_FILT_OUT5 0x86
#define ADC2_FILT_OUT6 0x87
#define ADC2_FILT_OUT7 0x88
#define ADC2_TH0_UPPER 0x89
#define ADC2_TH1_UPPER 0x8A
#define ADC2_TH2_UPPER 0x8B
#define ADC2_TH3_UPPER 0x8C
#define ADC2_TH4_UPPER 0x8D
#define ADC2_TH5_UPPER 0x8E
#define ADC2_TH6_UPPER 0x8F
#define ADC2_TH7_UPPER 0x90
#define ADC2_CNT0_UPPER 0x91
#define ADC2_CNT1_UPPER 0x92
#define ADC2_CNT2_UPPER 0x93
#define ADC2_CNT3_UPPER 0x94
#define ADC2_CNT4_UPPER 0x95
#define ADC2_CNT5_UPPER 0x96
#define ADC2_CNT6_UPPER 0x97
#define ADC2_CNT7_UPPER 0x98
#define ADC2_TH0_LOWER 0x9A
#define ADC2_TH1_LOWER 0x9B
#define ADC2_TH2_LOWER 0x9C
#define ADC2_TH3_LOWER 0x9D
#define ADC2_TH4_LOWER 0x9E
#define ADC2_TH5_LOWER 0x9F
#define ADC2_TH6_LOWER 0xA0
#define ADC2_TH7_LOWER 0xA1
#define ADC2_CNT0_LOWER 0xA2
#define ADC2_CNT1_LOWER 0xA3
#define ADC2_CNT2_LOWER 0xA4
#define ADC2_CNT3_LOWER 0xA5
#define ADC2_CNT4_LOWER 0xA6
#define ADC2_CNT5_LOWER 0xA7
#define ADC2_CNT6_LOWER 0xA8
#define ADC2_CNT7_LOWER 0xA9
#define ADC2_UP_IRQ_CTRL 0xAA
#define ADC2_LOW_IRQ_CTRL 0xAB
#define ADC2_UP_IRQ_STS 0xAC
#define ADC2_LOW_IRQ_STS 0xAD
#define SYS_STRTUP_STS 0xAE
#define PWMGEN1_FREQ_DIV 0xB0
#define PWMGEN1_DUTY_CYCLE 0xB1
#define PWMGEN2_FREQ_DIV 0xB2
#define PWMGEN2_DUTY_CYCLE 0xB3
#define PWMGEN3_FREQ_DIV 0xB4
#define PWMGEN3_DUTY_CYCLE 0xB5
#define TM_XSFR 0xB6
#define TEMPSENSE_TEST 0xB7
#define BG_TEST 0xB8
#define VMON_SEN_TEST 0xB9
#define VREF5V_TEST 0xBA
#define VSUPP_SEN_TEST 0xBB
#define HSS_TEST 0xBC
#define ADC1_TEST 0xBD
#define ADC2_TEST 0xBE
#define PERIPHERAL_TEST 0xBF
#define CAL_MI_VBAT_OFS 0xC0
#define CAL_MI_VBAT_TEMP 0xC1
#define CAL_ADC10_VBAT_OFS 0xC2
#define CAL_ADC10_VBAT_TEMP 0xC3
#define CAL_ADC10_VS_OFS 0xC4
#define CAL_ADC10_VS_TEMP 0xC5
#define CAL_TEMP1_OFFSET 0xC6
#define CAL_TEMP1_GAIN 0xC7
#define CAL_TEMP2_OFFSET 0xC8
#define CAL_TEMP2_GAIN 0xC9
#define CAL_CURRSENSE_OFS 0xCA
#define CAL_CURRSENSE_GAIN 0xCB
#define CAL_MI_VS_OFS 0xCC
#define CAL_MI_VS_TEMP 0xCD
#define TM_XSFR_PASSWD 0xD0
#define CNF_5V0_PARAM_D 0xD1
#define CNF_5V0_PARAM_P 0xD2
#define CNF_5V0_PARAM_I 0xD3
#define CNF_1V5_PARAM_D 0xD4
#define CNF_1V5_PARAM_P 0xD5
#define CNF_1V5_PARAM_I 0xD6
#define CNF_HALLS_PARAM_D 0xD7
#define CNF_HALLS_PARAM_P 0xD8
#define CNF_HALLS_PARAM_I 0xD9
#define TRIM_CONFIRM 0xDA
#define TRIM_5V0_VOLT 0xDB
#define TRIM_1V5_VOLT 0xDC
#define TRIM_0V9_VOLT 0xDD
#define TRIM_5VHALLS 0xDE
#define TRIM_CBIAS 0xDF
#define TRIM_BG_BUFF_MI 0xE0
#define TRIM_VREF5V 0xE1
#define TRIM_TSENSE1 0xE2
#define TRIM_TSENSE2 0xE3
#define TRIM_1_LS1 0xE4
#define TRIM_2_LS1 0xE5
#define GP_TRC_OUT_REG 0xE6
#define TRIM_4_LS1 0xE7
#define TRIM_SEL_LS1 0xE8
#define TRIM_1_LS2 0xE9
#define TRIM_2_LS2 0xEA
#define GP_TRC_IN_REG 0xEB
#define TRIM_4_LS2 0xF0
#define TRIM_SEL_LS2 0xF1
#define TRIM_HS 0xF2
#define TRIM_HS2 0xF3
#define TRIM_CURR_SENS_OFS 0xF4
#define VSUPP_SEN_TEST_2 0xF5
#define ADC1_TEST_2 0xF6
#define ADC2_TEST_2 0xF7


/* XSFR default value definition in plain format */
#define WAKE_STATUS_d    0x00
#define PMU_SUPPLY_STS_d    0x01
#define HALL_SUPPY_CTRL_d    0x02
#define PMU_ERROR_STS_d    0x03
#define PMU_RST_STS_d    0x04
#define SUPPLEMENT_CTRL_d    0x05
#define INTERRUPT_STATUS_d    0x06
#define WDT1_TRIG_d    0x07
#define PMU_WAKEUP_CTRL_d    0x08
#define SWITCHES_INTERRUPT_STATUS_d    0x09
#define CNF_CYC_SENSE_d    0x0A
#define CNF_CYC_WAKE_d    0x0B
#define CNF_CYC_SAMPLE_DEL_d    0x0C
#define MON1_CRTL_STS_d    0x0D
#define MON2_CRTL_STS_d    0x0E
#define MON3_CRTL_STS_d    0x0F
#define MON4_CRTL_STS_d    0x10
#define MON5_CRTL_STS_d    0x11
#define LIN_CTRL_d    0x12
#define LIN_CTRL_STS_d    0x13
#define LIN_TEST_d    0x14
#define LS1_CTRL_d    0x15
#define LS2_CTRL_d    0x16
#define HS_CTRL_d    0x17
#define HS_CTRL2_d    0x18
#define CLKGEN_d    0x19
#define OPA_CTRL_d    0x1A
#define RESPIN_BLIND_TIME_d    0x1B
#define MEASUREMENT_CTRL_d    0x1C
#define HS2_CTRL_d    0x1E
#define HS2_CTRL2_d    0x1F
#define WAKE_STS_FAIL_d    0x20
#define WAKE_STS_MON_d    0x21
#define WAKE_STS_GPIO0_d    0x22
#define WAKE_STS_GPIO1_d    0x23
#define WAKE_CONF_GPIOP0_RI_d    0x24
#define WAKE_CONF_GPIOP0_FA_d    0x25
#define WAKE_CONF_GPIOP1_RI_d    0x26
#define WAKE_CONF_GPIOP1_FA_d    0x27
#define WAKE_CNF_GPIO0_CYC_d    0x28
#define WAKE_CNF_GPIO1_CYC_d    0x29
#define PMU_WAKEUP_TIMING_d    0x2B
#define MEAS_CTRL_ADC1_d    0x2F
#define MEAS_ADC1_SQ1_d    0x30
#define MEAS_ADC1_SQ2_d    0x31
#define MEAS_ADC1_SQ3_d    0x32
#define MEAS_ADC1_SQ4_d    0x33
#define MEAS_ADC1_SQ5_d    0x34
#define MEAS_ADC1_SQ6_d    0x35
#define MEAS_ADC1_SQ7_d    0x36
#define MEAS_ADC1_SQ8_d    0x37
#define ADC1_MMODE0_3_d    0x38
#define ADC1_MMODE4_7_d    0x39
#define ADC1_FILT0_3_LEN_d    0x3A
#define ADC1_FILT4_7_LEN_d    0x3B
#define ADC1_FILT_UP_CTRL_d    0x3C
#define ADC1_FILT_LO_CTRL_d    0x3D
#define ADC1_FILT_OUT0_d    0x3E
#define ADC1_FILT_OUT1_d    0x3F
#define ADC1_FILT_OUT2_d    0x40
#define ADC1_FILT_OUT3_d    0x41
#define ADC1_FILT_OUT4_d    0x42
#define ADC1_FILT_OUT5_d    0x43
#define ADC1_FILT_OUT6_d    0x44
#define ADC1_FILT_OUT7_d    0x45
#define ADC1_TH0_UPPER_d    0x46
#define ADC1_TH1_UPPER_d    0x47
#define ADC1_TH2_UPPER_d    0x48
#define ADC1_TH3_UPPER_d    0x49
#define ADC1_TH4_UPPER_d    0x4A
#define ADC1_TH5_UPPER_d    0x4B
#define ADC1_TH6_UPPER_d    0x4C
#define ADC1_TH7_UPPER_d    0x4D
#define ADC1_CNT0_UPPER_d    0x4E
#define ADC1_CNT1_UPPER_d    0x4F
#define ADC1_CNT2_UPPER_d    0x50
#define ADC1_CNT3_UPPER_d    0x51
#define ADC1_CNT4_UPPER_d    0x52
#define ADC1_CNT5_UPPER_d    0x53
#define ADC1_CNT6_UPPER_d    0x54
#define ADC1_CNT7_UPPER_d    0x55
#define ADC1_TH0_LOWER_d    0x56
#define ADC1_TH1_LOWER_d    0x57
#define ADC1_TH2_LOWER_d    0x58
#define ADC1_TH3_LOWER_d    0x59
#define ADC1_TH4_LOWER_d    0x5A
#define ADC1_TH5_LOWER_d    0x5B
#define ADC1_TH6_LOWER_d    0x5C
#define ADC1_TH7_LOWER_d    0x5D
#define ADC1_CNT0_LOWER_d    0x5E
#define ADC1_CNT1_LOWER_d    0x5F
#define ADC1_CNT2_LOWER_d    0x60
#define ADC1_CNT3_LOWER_d    0x61
#define ADC1_CNT4_LOWER_d    0x62
#define ADC1_CNT5_LOWER_d    0x63
#define ADC1_CNT6_LOWER_d    0x64
#define ADC1_CNT7_LOWER_d    0x65
#define ADC1_UP_IRQ_CTRL_d    0x66
#define ADC1_LOW_IRQ_CTRL_d    0x67
#define ADC1_UP_IRQ_STS_d    0x68
#define ADC1_LOW_IRQ_STS_d    0x69
#define MEAS_CTRL_ADC2_d    0x6F
#define MEAS_ADC2_SQ1_d    0x70
#define MEAS_ADC2_SQ2_d    0x71
#define MEAS_ADC2_SQ3_d    0x72
#define MEAS_ADC2_SQ4_d    0x73
#define MEAS_ADC2_SQ5_d    0x74
#define MEAS_ADC2_SQ6_d    0x75
#define MEAS_ADC2_SQ7_d    0x76
#define MEAS_ADC2_SQ8_d    0x77
#define ADC2_MMODE0_3_d    0x7A
#define ADC2_MMODE4_7_d    0x7B
#define ADC2_FILT2_CTRL_d    0x7C
#define ADC2_FILT0_3_LEN_d    0x7D
#define ADC2_FILT4_7_LEN_d    0x7E
#define ADC2_FILT_UP_CTRL_d    0x7F
#define ADC2_FILT_LO_CTRL_d    0x80
#define ADC2_FILT_OUT0_d    0x81
#define ADC2_FILT_OUT1_d    0x82
#define ADC2_FILT_OUT2_d    0x83
#define ADC2_FILT_OUT3_d    0x84
#define ADC2_FILT_OUT4_d    0x85
#define ADC2_FILT_OUT5_d    0x86
#define ADC2_FILT_OUT6_d    0x87
#define ADC2_FILT_OUT7_d    0x88
#define ADC2_TH0_UPPER_d    0x89
#define ADC2_TH1_UPPER_d    0x8A
#define ADC2_TH2_UPPER_d    0x8B
#define ADC2_TH3_UPPER_d    0x8C
#define ADC2_TH4_UPPER_d    0x8D
#define ADC2_TH5_UPPER_d    0x8E
#define ADC2_TH6_UPPER_d    0x8F
#define ADC2_TH7_UPPER_d    0x90
#define ADC2_CNT0_UPPER_d    0x91
#define ADC2_CNT1_UPPER_d    0x92
#define ADC2_CNT2_UPPER_d    0x93
#define ADC2_CNT3_UPPER_d    0x94
#define ADC2_CNT4_UPPER_d    0x95
#define ADC2_CNT5_UPPER_d    0x96
#define ADC2_CNT6_UPPER_d    0x97
#define ADC2_CNT7_UPPER_d    0x98
#define ADC2_TH0_LOWER_d    0x9A
#define ADC2_TH1_LOWER_d    0x9B
#define ADC2_TH2_LOWER_d    0x9C
#define ADC2_TH3_LOWER_d    0x9D
#define ADC2_TH4_LOWER_d    0x9E
#define ADC2_TH5_LOWER_d    0x9F
#define ADC2_TH6_LOWER_d    0xA0
#define ADC2_TH7_LOWER_d    0xA1
#define ADC2_CNT0_LOWER_d    0xA2
#define ADC2_CNT1_LOWER_d    0xA3
#define ADC2_CNT2_LOWER_d    0xA4
#define ADC2_CNT3_LOWER_d    0xA5
#define ADC2_CNT4_LOWER_d    0xA6
#define ADC2_CNT5_LOWER_d    0xA7
#define ADC2_CNT6_LOWER_d    0xA8
#define ADC2_CNT7_LOWER_d    0xA9
#define ADC2_UP_IRQ_CTRL_d    0xAA
#define ADC2_LOW_IRQ_CTRL_d    0xAB
#define ADC2_UP_IRQ_STS_d    0xAC
#define ADC2_LOW_IRQ_STS_d    0xAD
#define SYS_STRTUP_STS_d    0xAE
#define PWMGEN1_FREQ_DIV_d    0xB0
#define PWMGEN1_DUTY_CYCLE_d    0xB1
#define PWMGEN2_FREQ_DIV_d    0xB2
#define PWMGEN2_DUTY_CYCLE_d    0xB3
#define PWMGEN3_FREQ_DIV_d    0xB4
#define PWMGEN3_DUTY_CYCLE_d    0xB5
#define TM_XSFR_d    0xB6
#define TEMPSENSE_TEST_d    0xB7
#define BG_TEST_d    0xB8
#define VMON_SEN_TEST_d    0xB9
#define VREF5V_TEST_d    0xBA
#define VSUPP_SEN_TEST_d    0xBB
#define HSS_TEST_d    0xBC
#define ADC1_TEST_d    0xBD
#define ADC2_TEST_d    0xBE
#define PERIPHERAL_TEST_d    0xBF
#define CAL_MI_VBAT_OFS_d    0xC0
#define CAL_MI_VBAT_TEMP_d    0xC1
#define CAL_ADC10_VBAT_OFS_d    0xC2
#define CAL_ADC10_VBAT_TEMP_d    0xC3
#define CAL_ADC10_VS_OFS_d    0xC4
#define CAL_ADC10_VS_TEMP_d    0xC5
#define CAL_TEMP1_OFFSET_d    0xC6
#define CAL_TEMP1_GAIN_d    0xC7
#define CAL_TEMP2_OFFSET_d    0xC8
#define CAL_TEMP2_GAIN_d    0xC9
#define CAL_CURRSENSE_OFS_d    0xCA
#define CAL_CURRSENSE_GAIN_d    0xCB
#define CAL_MI_VS_OFS_d    0xCC
#define CAL_MI_VS_TEMP_d    0xCD
#define TM_XSFR_PASSWD_d    0xD0
#define CNF_5V0_PARAM_D_d    0xD1
#define CNF_5V0_PARAM_P_d    0xD2
#define CNF_5V0_PARAM_I_d    0xD3
#define CNF_1V5_PARAM_D_d    0xD4
#define CNF_1V5_PARAM_P_d    0xD5
#define CNF_1V5_PARAM_I_d    0xD6
#define CNF_HALLS_PARAM_D_d    0xD7
#define CNF_HALLS_PARAM_P_d    0xD8
#define CNF_HALLS_PARAM_I_d    0xD9
#define TRIM_CONFIRM_d    0xDA
#define TRIM_5V0_VOLT_d    0xDB
#define TRIM_1V5_VOLT_d    0xDC
#define TRIM_0V9_VOLT_d    0xDD
#define TRIM_5VHALLS_d    0xDE
#define TRIM_CBIAS_d    0xDF
#define TRIM_BG_BUFF_MI_d    0xE0
#define TRIM_VREF5V_d    0xE1
#define TRIM_TSENSE1_d    0xE2
#define TRIM_TSENSE2_d    0xE3
#define TRIM_1_LS1_d    0xE4
#define TRIM_2_LS1_d    0xE5
#define GP_TRC_OUT_REG_d    0xE6
#define TRIM_4_LS1_d    0xE7
#define TRIM_SEL_LS1_d    0xE8
#define TRIM_1_LS2_d    0xE9
#define TRIM_2_LS2_d    0xEA
#define GP_TRC_IN_REG_d    0xEB
#define TRIM_4_LS2_d    0xF0
#define TRIM_SEL_LS2_d    0xF1
#define TRIM_HS_d    0xF2
#define TRIM_HS2_d    0xF3
#define TRIM_CURR_SENS_OFS_d    0xF4
#define VSUPP_SEN_TEST_2_d    0xF5
#define ADC1_TEST_2_d    0xF6
#define ADC2_TEST_2_d    0xF7